Boot-set res5 0 PCB config=1, PCB ckeck=0 DRAM Channel A Calibration. DRAM A Size = 1024 Mbytes. DRAM Channel B Calibration. DRAM B Size = 1024 Mbytes. DRAM Channel C Calibration. DRAM C Size = 512 Mbytes. Boot Start Pmain 0x0000a000 0x0000a000 EMMC boot CID:0x45b453d5 :0x3200cc72 :0x31364733 :0x11010030 LZHS addr:0x00100040 LZHS size:0x00176848 LZHS checksum:0x00000034 LZHS size:0x00176848 store RSA & AES keys in DMX SRAM LZHS begin Boot Start Lmain POWER ON MT5891 Boot Loader v0.9 [Check Recovery mode KEY]======================================== Boot reason: A/C power on!![Check Recovery mode KEY]PDWNC_ReadWakeupReason: 6 [Check Recovery mode KEY]PDWNC_ReadWakeupReason: 6 [Check Recovery mode KEY]PDWNC_ReadServoADCChannelValue: 1023 [Check Recovery mode KEY]PDWNC_ReadServoADCChannelValue: 3ff [Check Recovery mode KEY]======================================== [Check Recovery mode KEY]It is LEFTRIGHTPOWER or no pressing from LKB LOADER_MtkEnvInitFunc : ui4_RebootEventDetailEepAddr = 0xa1a [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] LOADER FAST READ EMMC! ==Loader emmc pinmux set result 0x1000a0, arbitor 0x20 Init config, cid = 0x11010030, dsc=0x45b453d5,rca=0x3200cc72,ocr=0x31364733 [MSDC] 11010030:31364733:3200cc72:45b453d5 [MSDC] id1:00303136 id2:47333200 [MSDC] eMMC Name: UNKNOWN ---Set FIFO path and Init--- [MSDC] Set Bus Clock as HS25(MHz) Success!,src 3 ,mode 0, div 4 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 1 ! [eMMC2DRAM]enter into SDR50 Mode, max dtr 200000000 [MSDC] Set Bus Clock as HS0(MHz) Success!,src 0 ,mode 0, div 16 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 0 ! [MSDC] Set Bus Clock as HS50(MHz) Success!,src 3 ,mode 0, div 2 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 1 ! [MSDC] unexpected interrupt: INT=0x8000 [MSDC] BasicDMA MsdcHandleDataTransfer: Failed to send/receive data (AccuVect 0x00000000 INTR 0x00008000). msdc_drv.c line 2483 [MSDC] card status 0x4 in error handle Enter Loader Autok online tune.....speedMode 1 EMMC Tune AutoK READ sampel edge 0 --> 1 [MSDC] Data READ Tune Success get_mmcsize emmc_size2 0x00000003 ab400000 [MSDC] Saved info: id1 = 0x53d53200, id2=0xcc723136,flag 0xaabbccdd,speedmode 5, dlycell 74 Support HS400, card type ext_csd[196]0x57 Support HS200, card type ext_csd[196]0x57 u4mask = 0x3 [MSDC] Cur info: id1 = 0x53d53200, id2=0xcc723136,flag 0xaabbccdd,speedmode 5, dlycell 73 [MSDC] -----The information is match, Alrady run autok before, ignore this time-- [MSDC] Load Param: ---Set FIFO path and Init--- [MSDC] Clock frequency = 900 MHz, Clock period = 1111 ps, 1 delay cell = 15 ps [MSDC] TCMGET_DLYCELL_PERT = 73 =========================================== [QHB flag] rDtvCfg.u1Flags4 =0 [HB flag] rDtvCfg.u1Flags2 =0 [QHB flag] prLdrData->rDtvCfg.u1Flags4 = 0 [HB flag] prLdrData->rDtvCfg.u1Flags2 = 0 =========================================== set 223 to low. LOADER_MtkEnvInitFunc: PDWNC_ReadWakeupReason = 6 [2K17_gpio] AC, set EEPROM_TPV_ENABLE_QHB_ADDRESS to 0 [QHB] Set QHB flag when AC on & Previous system state is off. [QHB] u1EmmcFirstBoot = 0x1 [QHB] It is not EmmcFirstBoot, do no cation with QHB. LOADER_MtkEnvInitFunc: set ui1_reboot_event_detail to 0 LOADER_MtkEnvInitFunc: ui1_reboot_event_detail = 0 (read back) read from eeprom ioff 0 phy_off 3360 lbz: get _u1AtmosEnable = 0 ************pu1DrvLoadHdmi14Edid u1Index1= 0 lbz: get _u1AtmosEnable = 0 ************pu1DrvLoadHdmi20Edid u1Index1= 0 _LOADER_ResetWiFi_1st Support network!1st MAC in EEP is valid (70:af:24:0e:a6:01) 1st : (70:af:24:0e:a6:01) 2nd : (70:af:24:0e:a6:01) Remove Quiet Boot misc control in eeprom when Watchdog reason. IR DATA register : 0x 0 T8032 init A/C on case loader stage... Load T8032 FW (addr: 0x d63fac, size: 24849)success!! T8032 FW version: 6 T8032 change to loader stage... header check ok digest check ok read done ConsoleLock_to_T8032 (0x0) LDR_FlashCopy 0xf010 0x71c80 0x80 LOADER_MtkEnvInitFunc : ui4_RebootEventDetailEepAddr = 0xa1a =========================================== [QHB flag] rDtvCfg.u1Flags4 =128 [HB flag] rDtvCfg.u1Flags2 =0 [QHB flag] prLdrData->rDtvCfg.u1Flags4 = 128 [HB flag] prLdrData->rDtvCfg.u1Flags2 = 0 =========================================== set 223 to low. header check ok digest check ok read done writer done header check ok digest check ok read done writer done CC_PHP_SUPPORT_LOADER_CONSOLE_LOCK defined Uart Rx disabled header check ok digest check ok read done ConsoleLock_to_T8032 (0x0) [UPG upgrade ~ PDWNC_WAKE_UP_REASON_AC_POWER] u1SlicneUpgradeStatus = 0 Org:0x10 Flags:0x10 Before u1EmmcFirstBoot = 0x1 Do not need to configure boot flag After EmmcFirstBoot Org:0x10 Flags:0x10 After u1EmmcFirstBoot = 0x1Disable VGA wakeup support WOL _PDWNC_SetupEthernetWakeup(WOL):u4WOWLVal:0x1 _PDWNC_SetupEthernetWakeup(WOL)!! MAC register switch to arm ui4_CtnEepAddr : 0x980 CTN is not XXPUS9104 u1RedLedBriValue : 15 [GPIO_MtkPowerOffFunc]1453 set GPIO 223, value 0. set GPIO 207, value 0. Standby PDWNC_TPV_SetupWakeupSourceWOWLAN: u1Wowlan = 1 PDWNC_TPV_SetupWakeupSourceWOWLAN: uiSwitchOnWithchromecast = 0 PDWNC_TPV_SetupWakeupSourceWOWLAN : WOW_GPIO_DET = 1, WOBLE_GPIO_DET = 1 CTN is not XXPUS9104 u1RedLedBriValue : 15 PDWNC_TPV_SetupSilentReboot: ui1_silent_reboot = 0 PDWNC_TPV_SetupSilentReboot: no need to setup register time of silent reboot PDWNC_EnterPowerDown(200100,0) SIF_Master0: V2 design SIF_Master1: V2 design SIF_Master2: V2 design SIF_Master3: V2 design SIF_Master4: V2 design Master5 only Used in secure mode! SWITCH_T8032 �" Now is writting DIV_SEL as 0x78! �(DC Wakeu�Boot-set res5 0 Preloader T8032 ack ! PCB config=1, PCB ckeck=0 DRAM Channel A Calibration. DRAM A Size = 1024 Mbytes. DRAM Channel B Calibration. DRAM B Size = 1024 Mbytes. DRAM Channel C Calibration. DRAM C Size = 512 Mbytes. Boot Start Pmain 0x0000a000 0x0000a000 EMMC boot CID:0x45b453d5 :0x3200cc72 :0x31364733 :0x11010030 LZHS addr:0x00100040 LZHS size:0x00176848 LZHS checksum:0x00000034 LZHS size:0x00176848 store RSA & AES keys in DMX SRAM LZHS begin Boot Start Lmain POWER ON MT5891 Boot Loader v0.9 [Check Recovery mode KEY]======================================== [Check Recovery mode KEY]PDWNC_ReadWakeupReason: 4 [Check Recovery mode KEY]PDWNC_ReadWakeupReason: 4 [Check Recovery mode KEY]PDWNC_ReadServoADCChannelValue: 1023 [Check Recovery mode KEY]PDWNC_ReadServoADCChannelValue: 3ff [Check Recovery mode KEY]======================================== [Check Recovery mode KEY] nothing happened. LOADER_MtkEnvInitFunc : ui4_RebootEventDetailEepAddr = 0xa1a [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] LOADER FAST READ EMMC! ==Loader emmc pinmux set result 0x1000a0, arbitor 0x20 Init config, cid = 0x11010030, dsc=0x45b453d5,rca=0x3200cc72,ocr=0x31364733 [MSDC] 11010030:31364733:3200cc72:45b453d5 [MSDC] id1:00303136 id2:47333200 [MSDC] eMMC Name: UNKNOWN ---Set FIFO path and Init--- [MSDC] Set Bus Clock as HS25(MHz) Success!,src 3 ,mode 0, div 4 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 1 ! [eMMC2DRAM]enter into SDR50 Mode, max dtr 200000000 [MSDC] Set Bus Clock as HS0(MHz) Success!,src 0 ,mode 0, div 16 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 0 ! [MSDC] Set Bus Clock as HS50(MHz) Success!,src 3 ,mode 0, div 2 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 1 ! get_mmcsize emmc_size2 0x00000003 ab400000 [MSDC] Saved info: id1 = 0x53d53200, id2=0xcc723136,flag 0xaabbccdd,speedmode 5, dlycell 74 Support HS400, card type ext_csd[196]0x57 Support HS200, card type ext_csd[196]0x57 u4mask = 0x3 [MSDC] Cur info: id1 = 0x53d53200, id2=0xcc723136,flag 0xaabbccdd,speedmode 5, dlycell 74 [MSDC] -----The information is match, Alrady run autok before, ignore this time-- [MSDC] Load Param: ---Set FIFO path and Init--- [MSDC] Clock frequency = 900 MHz, Clock period = 1111 ps, 1 delay cell = 15 ps [MSDC] TCMGET_DLYCELL_PERT = 74 [MSDC] unexpected interrupt: INT=0x8000 [MSDC] BasicDMA MsdcHandleDataTransfer: Failed to send/receive data (AccuVect 0x00000000 INTR 0x00008000). msdc_drv.c line 2483 [MSDC] card status 0x4 in error handle Enter Loader Autok online tune.....speedMode 1 EMMC Tune AutoK READ sampel edge 0 --> 1 [MSDC] Data READ Tune Success =========================================== [QHB flag] rDtvCfg.u1Flags4 =128 [HB flag] rDtvCfg.u1Flags2 =0 [QHB flag] prLdrData->rDtvCfg.u1Flags4 = 0 [HB flag] prLdrData->rDtvCfg.u1Flags2 = 0 =========================================== set 223 to low. LOADER_MtkEnvInitFunc: PDWNC_ReadWakeupReason = 4 [2K17_gpio] IRRC/KEYPAD/CEC, set EEPROM_TPV_ENABLE_QHB_ADDRESS to 0 ui4_CtnEepAddr : 0x980 CTN is not XXPUS9104 u1RedLedBriValue : 15 _LOADER_ResetWiFi_1st Support network!1st MAC in EEP is valid (70:af:24:0e:a6:01) 1st : (70:af:24:0e:a6:01) 2nd : (70:af:24:0e:a6:01) Remove Quiet Boot misc control in eeprom when Watchdog reason. IR DATA register : 0x 0 T8032 change to loader stage... header check ok digest check ok read done ConsoleLock_to_T8032 (0x0) LDR_FlashCopy 0xf010 0x71c80 0x80 LOADER_MtkEnvInitFunc : ui4_RebootEventDetailEepAddr = 0xa1a =========================================== [QHB flag] rDtvCfg.u1Flags4 =0 [HB flag] rDtvCfg.u1Flags2 =0 [QHB flag] prLdrData->rDtvCfg.u1Flags4 = 0 [HB flag] prLdrData->rDtvCfg.u1Flags2 = 0 =========================================== set 223 to low. header check ok digest check ok read done writer done header check ok digest check ok read done writer done CC_PHP_SUPPORT_LOADER_CONSOLE_LOCK defined Uart Rx disabled header check ok digest check ok read done ConsoleLock_to_T8032 (0x0) [_LdrDetermineEnterStandby 416] not PDWNC_WAKE_UP_REASON_AC_POWER [UPG upgrade ~ not PDWNC_WAKE_UP_REASON_AC_POWER] u1SlicneUpgradeStatus = 0 PDWNC_Init normal cold boot ui1_silent_reboot = 0 After check ui1_silent_reboot, [QHB]u1Flags4: org=0, flag4=0 efrcpowerGpio=256 [OLED Tcon error handle][GPIO_MtkPowerOnFunc 1350]display_techonlogy = 0 [OLED Tcon error handle][GPIO_MtkPowerOnFunc 1356] Not OLED panel = 0 [Silent upgrade check][GPIO_MtkPowerOnFunc 1360] SILENT_UPGRADE_STATUS_ADDRESS = 0 keep FRC power rDtvCfg.u1Flags4 = 0, PDWNC_ReadWakeupReason() = 4 After FRC power, [QHB]u1Flags4: org=0, flag4=0 eResetfrcGpio=51 set 223 low. USB0: Set GPIO42 = 1. USB1: Set GPIO43 = 1. USB2: Set GPIO44 = 1. USB3: Set GPIO210 = 1. Normal Boot (Not Quiet Boot) u4BmpAddress_philips_logo:0xd8e360 u4BmpWidth_philips_logo:476 u4BmpHeight_philips_logo:242 au1PhilipsLogoBmpSize:460768 au1PhilipsLogoBmpDrawBuffer_size/2:952000 au1PhilipsLogoBmpSize/2:230384 u4DstAddress_philips_logo:0xbd3510 Display 0x00e775b4 background:0x00000000 |||||||u1FRC = au1Index 2; Hardcode panel id 3 for EU3 with NT333... [opcode::UHD=2,HDR=1,FRC=2,BACKENDPQ=0,FLIP/MIRROR=0,Channel decode 3,Frequency=0,DNM=1,IsMjcSup=26, Panel id =1,opcode end&&&&&&] [Dynamic PNL] Find VideoModeAttribute[27]: PNL_Index=0x60003 [DisplayInit]EU=0x39, US=0x0 [DisplayInit]CountryDefault=0x39 [SA7] vDDDSInit [DisplayInit] ##1 SV_DCLK_50HZ |||||||u1FRC = au1Index 2; [LVDS]vDrvApplyPanelTiming..... vDrvResetVOPLLFlowFlag ###VbyOne VOPLLInit finsih###vDrvSetOCLKClockSchemaInit. ###VbyOne VOPLLSet finsih###[SA7] _fgVopllUseDDDS = True @vDrvSetVOPLLClockSchema -->normal [LVDS] VOPLL Initialize successful ! vApiPanelPowerSequence= TRUE (START)VB1 VB1 impedance cal pass and value =4 ................. VB1 VB1 impedance cal set to default terminaion 8......................... [VB1][LOCKN] 0x709c set to FUNCTION2 [VB1][HTPDN] 0x7097 set to FUNCTION2 [VB1][SetPadOn] DUAL_PORT [VB1][SetPadOn] GM_LANE_4 [VB1][SetPadOn] u1LaneCnt=2, u1GraphLaneCnt=12 LVDSA_EXT_EN: B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 LADSA_pad: ECK(L9) E4(L11) E3(L10) E2(L8) E1(L7) E0(L6) OCK(L3) O4(L5) O3(L4) O2(L2) O1(L1) O0(L0) u2PadOn=0x1, pu4LaneMap[u1Lane]=8 au4PadRemapTbl[0]= 0 u2PadOn[0]=0x1 u2PadOn=0x3, pu4LaneMap[u1Lane]=9 au4PadRemapTbl[1]= 1 u2PadOn[1]=0x3 u2PadOn=0x7, pu4LaneMap[u1Lane]=10 au4PadRemapTbl[2]= 2 u2PadOn[2]=0x7 u2PadOn=0x27, pu4LaneMap[u1Lane]=11 au4PadRemapTbl[3]= 5 u2PadOn[3]=0x27 u2PadOn=0x2f, pu4LaneMap[u1Lane]=0 au4PadRemapTbl[4]= 3 u2PadOn[4]=0x2f u2PadOn=0x3f, pu4LaneMap[u1Lane]=1 au4PadRemapTbl[5]= 4 u2PadOn[5]=0x3f u2PadOn=0x3f, pu4LaneMap[u1Lane]=2 au4PadRemapTbl[6]= 6 u2PadOn[6]=0x3f u2PadOn=0x3f, pu4LaneMap[u1Lane]=3 au4PadRemapTbl[7]= 7 u2PadOn[7]=0x3f u2PadOn=0x3f, pu4LaneMap[u1Lane]=4 au4PadRemapTbl[8]= 8 u2PadOn[8]=0x3f u2PadOn=0x3f, pu4LaneMap[u1Lane]=5 au4PadRemapTbl[9]= 11 u2PadOn[9]=0x3f u2PadOn=0x3f, pu4LaneMap[u1Lane]=6 au4PadRemapTbl[10]= 9 u2PadOn[10]=0x3f u2PadOn=0x3f, pu4LaneMap[u1Lane]=7 au4PadRemapTbl[11]= 10 u2PadOn[11]=0x3f [VB1][SetPadOn] LVDSA_EXT_EN=0x3f [LVDS][backlight] DeltaTime=0 us-->no need to enable BL_DLYTIME_CUT!! LDR_isRecoveryMode function call start LDR_PanelLogo b_Result == TRUE. LDR_OsdDisplay(14, 0x371e0000, 1, 1) [OSD]Before PQ Module offset:i4H=521 i4V=4 [OSD]DBG XvYCC bypass [OSD]DBG Gamma position 0 or 1 [OSD]After PQ Module offset:i4H=378 i4V=4 display_techonlogy = 0 CTN = 55PUS6412/12 Not OLED, no need to add delay time for logo showing ui1_CtnBuf[5] = 0x36, ui1_CtnBuf[6] = 0x34 ,ui1_CtnBuf[7] = 0x31 ,ui1_CtnBuf[8] = 0x32 CTN is not XXPUS9103/XXPUS9104, no need to show GJ logo u4UpgUpgrading = 0 [LDR]_factoryCmdUpgradeByFunctionType_init is called [LDR] ui4_upgradeDeviceTypeAddr : 0x7200 [LDR] ui1_upgradeDeviceType : 0x0 [LDR] ui1_functionType : 0xff [LDR]_factoryCmdUpgradeByFunctionType_isSkipUpgradeEnabled is called, ui1_functionType == 4 [LDR]_factoryCmdUpgradeByFunctionType_isSkipUpgradeEnabled return FALSE Do USB upgrade u1USBBlock = 0x017c9cc0 USB: Vbus turn up time = 1373 ms, Max =0 ms. No USB device. /dev is created. /mnt is already existed. That is OK. /dev/msdc is created. /mnt/msdc_0 is created. ERR: mount /dev/msdc_0 as /mnt/msdc_0 fail. return value:-25 Error: SD mount fail, USB upgrade stop No cookie file or no Usb detected... Call LDR_setUnBoxUpgradeNvmFlag at line:1444 @ui4_unboxEepAddr is 0x3177 @ui1_unboxEepBuffer[0] is 0 @ui1_unboxEepBuffer[1] is 0 [ACD Loader] 12V status = 1,continue booting.recovery_opcode before_ui1_raw_data_1[0]_2[0]_3[0]= 0xea 0xea 0xea before_ui1_raw_data_1[1]_2[1]_3[1]= 0x44 0x44 0x44 before_ui1_raw_data_1[2]_2[2]_3[2]= 0x21 0x21 0x21 before_ui1_raw_data_1[3]_2[3]_3[3]= 0x40 0x40 0x40 before_ui1_raw_data_1[4]_2[4]_3[4]= 0x04 0x04 0x04 before_ui1_raw_data_1[5]_2[5]_3[5]= 0x20 0x20 0x20 before_ui1_raw_data_1[6]_2[6]_3[6]= 0x00 0x00 0x00 before_ui1_raw_data_1[7]_2[7]_3[7]= 0x40 0x40 0x40 before_ui1_raw_data_1[8]_2[8]_3[8]= 0x02 0x02 0x02 before_ui1_raw_data_1[9]_2[9]_3[9]= 0xc0 0xc0 0xc0 before_ui1_raw_data_1[10]_2[10]_3[10]= 0xf4 0xf4 0xf4 before_ui1_raw_data_1[11]_2[11]_3[11]= 0xf6 0xf6 0xf6 before_ui1_raw_data_1[12]_2[12]_3[12]= 0x0d 0x0d 0x0d before_ui1_raw_data_1[13]_2[13]_3[13]= 0x26 0x26 0x26 before_ui1_raw_data_1[14]_2[14]_3[14]= 0x1a 0x1a 0x1a before_ui1_raw_data_1[15]_2[15]_3[15]= 0x10 0x10 0x10 before_ui1_raw_data_1[16]_2[16]_3[16]= 0x80 0x80 0x80 before_ui1_raw_data_1[17]_2[17]_3[17]= 0x01 0x01 0x01recovery_opcode(3) recovery_opcode(4) after_ui1_raw_data_1[0]_2[0]_3[0]=0xea 0xea 0xea after_ui1_raw_data_1[1]_2[1]_3[1]=0x44 0x44 0x44 after_ui1_raw_data_1[2]_2[2]_3[2]=0x21 0x21 0x21 after_ui1_raw_data_1[3]_2[3]_3[3]=0x40 0x40 0x40 after_ui1_raw_data_1[4]_2[4]_3[4]=0x04 0x04 0x04 after_ui1_raw_data_1[5]_2[5]_3[5]=0x20 0x20 0x20 after_ui1_raw_data_1[6]_2[6]_3[6]=0x00 0x00 0x00 after_ui1_raw_data_1[7]_2[7]_3[7]=0x40 0x40 0x40 after_ui1_raw_data_1[8]_2[8]_3[8]=0x02 0x02 0x02 after_ui1_raw_data_1[9]_2[9]_3[9]=0xc0 0xc0 0xc0 after_ui1_raw_data_1[10]_2[10]_3[10]=0xf4 0xf4 0xf4 after_ui1_raw_data_1[11]_2[11]_3[11]=0xf6 0xf6 0xf6 after_ui1_raw_data_1[12]_2[12]_3[12]=0x0d 0x0d 0x0d after_ui1_raw_data_1[13]_2[13]_3[13]=0x26 0x26 0x26 after_ui1_raw_data_1[14]_2[14]_3[14]=0x1a 0x1a 0x1a after_ui1_raw_data_1[15]_2[15]_3[15]=0x10 0x10 0x10 after_ui1_raw_data_1[16]_2[16]_3[16]=0x80 0x80 0x80 after_ui1_raw_data_1[17]_2[17]_3[17]=0x01 0x01 0x01[CMain 1070][OLED Tcon error handle]display_techonlogy = 0 [CMain 1074][OLED Tcon error handle] Not OLED Panel. [_LdrDetermineEnterStandby 416] not PDWNC_WAKE_UP_REASON_AC_POWER [UPG upgrade ~ not PDWNC_WAKE_UP_REASON_AC_POWER] u1SlicneUpgradeStatus = 0 LDR_PostInit _LOADER_ResetWiFi_2nd Flash load lzhs header from 0x80000 to dram(0x1804d50), size=2048 Decompression uboot to 0x01000000... Flash load image from 0x80000 to dram(0x1804d50), size=0x43b8d TRUSTZONE_IN_CHB TCMGET_CHANNELA_SIZE 1024M, TCMGET_CHANNELB_SIZE() 1024M u4TzLzhsDstDram 0x7d005000 Flash load tz from 0x0(part_21) to dram(0x100000), size=0x6f972 LZHS start LZHS done TZ LZHS decode suc! src=0x100010,dst=0x7d005000,psize=0xf5000,lsize=0x6f972,chk=0x14 LZHS start LZHS done Starting image... U-Boot 2011.12 (Nov 08 2021 - 12:42:13) DRAM: 1.5 GiB u4DramSize: 0x800 WARNING: Caches not enabled MMC: Set max clk to 50MHZ in default Uboot max clock 52000000 [MSDC] aes init success! HOST 1 [MSDC] Set DMA Mode! [MSDC] 11010030:31364733:3200CC72:45B453D5 [MSDC] id1:00303136 id2:47333200 [MSDC] eMMC Name: UNKNOWN card type = 87 [emmc]bus timing switch to HS uboot bus timing 1 uboot set speed mode to 1 UBOOT Use NEW AutoK idea [emmc]bus width switch to 8(SDR) uboot bus width 2 [MSDC] uboot set clock: 0, ch 1 [MSDC] uboot id 10: src 0: mode 0 div 16 driving 0 [MSDC] (SDR)Set Bus Clock as 0(MHz) Success! MT5891 uboot Set driving[ch 1] [MSDC] uboot set clock: 25, ch 1 [MSDC] uboot id 8: src 3: mode 0 div 4 driving 1 [MSDC] (SDR)Set Bus Clock as 25(MHz) Success! MT5891 uboot Set driving[ch 1] [emmc]bus clock switch to 50000000 [MSDC] uboot set clock: 0, ch 1 [MSDC] uboot id 10: src 0: mode 0 div 16 driving 0 [MSDC] (SDR)Set Bus Clock as 0(MHz) Success! MT5891 uboot Set driving[ch 1] [MSDC] uboot set clock: 50, ch 1 [MSDC] uboot id 6: src 3: mode 0 div 2 driving 1 [MSDC] (SDR)Set Bus Clock as 50(MHz) Success! MT5891 uboot Set driving[ch 1] ---Uboot Set FIFO path and Init--- Uboot Apply Param: SpeedMode: 0x4a380cb3 K_IOCON: 0x200000a K_PAD_TUNE0: 0x272000 K_PAD_TUNE1: 0x0 K_PATCH_BIT0: 0x403c0007 K_PATCH_BIT1: 0xfffe00c9 K_PATCH_BIT2: 0x84821803 K_EMMC50_CFG0: 0x2e889f2 K_DAT_RD_DLY0: 0x1050303 K_DAT_RD_DLY1: 0x4030403 K_DAT_RD_DLY2: 0x0 K_DAT_RD_DLY3: 0x0 K_EMMC50_PAD_DS_TUNE: 0x12021 K_EMMC50_PAD_CMD_TUNE: 0x0 K_EMMC50_PAD_DAT01_TUNE: 0x0 K_EMMC50_PAD_DAT23_TUNE: 0x0 K_EMMC50_PAD_DAT45_TUNE: 0x0 K_EMMC50_PAD_DAT67_TUNE: 0x0 : 0 before Writing to MMC offset = 0x3900000 msdcgpiomsdcgpio=76,-1,-1,176,-1,-1, ...=====MSDC Add Autok Param=====... [0] = 0x200000a [1] = 0x272000 [2] = 0x0 [3] = 0x403c0007 [4] = 0xfffe00c9 [5] = 0x84821803 [6] = 0x2e889f2 [7] = 0x1050303 [8] = 0x4030403 [9] = 0x0 [10] = 0x0 [11] = 0x12021 [12] = 0x0 [13] = 0x0 [14] = 0x0 [15] = 0x0 [16] = 0x0 msdcautok=0x200000a,0x272000,0x0,0x403c0007,0xfffe00c9,0x84821803,0x2e889f2,0x1050303,0x4030403,0x0,0x0,0x12021,0x0,0x0,0x0,0x0,0x0 [ZJ Uboot] MSDC_EEPROM_Read API Capacity: 15758000128 get_mmcsize emmc_size3 0x00000003 ab400000 Read ok [crash count] the 0x46c is 0xd [crash count] OPW7-07 0 [crash count] enable = 1 (func: BIM_IsRecoveryMode) [ZJ Uboot] MSDC_EEPROM_Read API Read ok [crash count] u4Crashcount_bit = 23 (BIM_increaseCrashCounter) [ZJ Uboot] MSDC_EEPROM_Read API write ok [crash count] WakeupReason is not PDWNC_WAKE_UP_REASON_AC_POWER, counter accumulate 1 [crash count] count = 24 (MAX = 40) (func: BIM_IsRecoveryMode) [crash count] Crash counter has not exceed the MAX, boot base on misc pmisc_msg: boot-recovery before enter recovery,disable osd1 and osd2====== pmisc_msg: boot-recovery before enter recovery,disable osd1 and osd2====== [ZJ Uboot] MSDC_EEPROM_Read API Read ok ########################### val==0 recovery console override env_add_forbid_uart [ZJ Uboot] MSDC_EEPROM_Read API Read ok [ZJ Uboot] MSDC_EEPROM_Read API Read ok [ZJ Uboot] MSDC_EEPROM_Read API Read ok [ZJ Uboot] MSDC_EEPROM_Read API Read ok MSAF 2K17 FRC33 Platform [ZJ Uboot] MSDC_EEPROM_Read API Read ok 0.0.0.0 In: serial Out: serial Err: serial Net: init MMAC driver